1. Field of the Invention
The invention relates generally to signal transmitters more particularly to a transmitter having a method for reducing the frequency of a sampling clock signal used for converting a digital intermediate frequency (IF) signal to an analog IF signal.
2. Description of the Prior Art
Existing transmitters use digital signal processing for generating a digital intermediate frequency (IF) signal and then use a high speed digital to analog converter (DAC) for converting the digital IF signal to an analog IF signal. It is important in such transmitters that the DAC have a linear response so that incremental levels of the digital input signal are converted to consistent incremental levels in the analog output signal throughout the dynamic range of the output signal. A poor linearity causes distortion of the information that is transmitted.
In addition to the analog IF signal, the DAC also issues unwanted sets of IF analog signals, termed alias signals, as sidebands about a frequency that is used by the DAC for sampling the digital IF input signal. These IF alias signals must be suppressed in order to meet regulations by the Federal Communications Commission (FCC) in the United States and by other government agencies in other countries.
Existing transmitters use a radio frequency (RF) filter for suppressing alias signals. This approach has the advantage that hardware for the RF filter is probably required in any case in order to suppress feed through of a local signal (RFLO) used for upconverting the IF signal to an RF transmit signal. However, it may be difficult and expensive to produce an RF filter that suppresses the alias signals sufficiently to achieve the low spurious signal levels required by regulations.
Another approach used by existing transmitters is to increase the sampling frequency of the DAC in order to obtain a large frequency separation between the highest frequency in the desired IF signal and the lowest frequency in the undesired alias signal. Having a larger frequency separation, the alias signal can be more easily suppressed by an IF filter that passes the IF signal. Unfortunately, as the sampling frequency is increased it becomes more difficult and expensive to achieve good linearity in the DAC.
FIGS. 1A–B are frequency charts showing low side and high side frequency upconversion, respectively, for first and second transmitters of the prior art. The horizontal axes on the charts represent frequency and the vertical axes show the presence of signals. Zero frequency or DC is shown as a frequency F0. A sampling clock signal SPAC having a clock frequency FPAC is used in a DAC for converting a digital representation of an intermediate frequency (IF) signal to an analog IF signal SPAIF having IF channel frequencies corresponding to RF transmission channel frequencies.
The IF signal SPAIF has an IF frequency band ΔFPAIF between a lower IF frequency FPAIF1 and an upper IF frequency FPAIF2. The DAC also issues undesired alias signals having alias frequencies symmetrical about the clock frequency FPAC and harmonics of the clock frequency FPAC. The pairs of alias signals are frequency images and negative frequency images of the IF signal SPAIF.
Exemplary alias signals SPAA2 and SPAA1 about the fundamental of the clock frequency FPAC have alias frequencies from a lower sum alias frequency FPAA21 to an upper sum alias frequency FPA22 and an upper difference alias frequency FPAA11 to a lower difference alias frequency FPAA12, respectively, where the frequency difference between FPAC and FPA21 equals FPAIF1, the frequency difference between FPAC and FPAA22 equals FPAIF2, the frequency difference between FPAC and FPAA11 equals the negative of FPAIF1, and the frequency difference between FPAC and FPAA12 equals the negative of FPAIF2 It should be noted that the alias signals SPAA1 and SPAA2 each have a frequency band equal in width to the IF frequency band ΔFPAIF.
Referring to FIG. 1A an RF local oscillator (LO) signal SPALOL having an RF local oscillator (LO) frequency FPALOL is used for upconverting the IF signal SPAIF to an RF transmit signal SPARFL having an RF frequency band ΔFPARF from an RF frequency FPARFL1 corresponding to the IF frequency FPAIF1 to an RF frequency FPARFL2 corresponding to the IF frequency FPAIF2. In order to suppress feedthrough of the RFLO signal SPALOL in a single stage upconversion of the IF signal SPAIF1 the RFLO frequency FPALOL is separated from the RF frequency FPARFL1 by a frequency width ΔFPAIF1, equal to the frequency FPAIF1.
Referring to FIG. 1B an RFLO signal SPALOH having an RF LO frequency FPALOH is used for upconverting the IF signal SPAIF to an RF transmit signal SPARFH having the same RF frequency band ΔFPARF from an RF frequency FPARFH1 corresponding to the negative of the IF frequency FPAIF1 to an RF frequency FPARFH2 corresponding to the negative of the IF frequency FPAIF2. In order to suppress feedthrough of the RFLO signal SPALOH in a single stage upconversion of the IF signal SPAIF, the RFLO frequency FPALOH is separated from the RF frequency FPARFH1 by a frequency width ΔFPAIF1 equal to the negative of the frequency FPAIF1.
It should be noted that the RF transmit signals SPARFL and SPARFH have frequency bands ΔFPARF equal in width to the IF frequency band ΔFPAIF. An IF filter having a frequency response FRPAIF passes the IF signal SPAIF and suppresses the alias signals SPAA1 and SPAA2 so that the alias signals SPAA1 and SPAA2 do not contaminate the RF transmit signals SPARFL and SPA RFH with spurious emissions.
It is desirable to minimize the sampling CLK frequency FPAC in order to more easily and at lower cost to achieve good linearity in the DAC and other digital processing circuits. In existing transmitters where the IF frequency channels in the IF frequency band ΔFPAIF are upconverted to the RF frequency channels in the RF frequency band ΔFPARF, the CLK frequency FPAC is expressed according to an equation 1 as a function of a frequency ratio R between the lowest alias frequency FPAA12 that must be suppressed and the highest IF frequency FPAIF2 that must be passed in the IF frequency response FRPAIF of the IF filter (R=FPAA12/FPAIF2), the width of the RF frequency band ΔFPARF, and the lowest IF frequency FPAIF1.FPAC=(ΔFPARF+ΔFPAIF1)*(1+R)  (1
It can be seen from the equation 1 that the clock frequency FPAC can be minimized by reducing the frequency ratio R and/or reducing the lowest IF frequency FPAIF1. However, for a given technology, after a certain value is reached it is difficult and expensive to achieve the filter response FRPAIF to further reduce the frequency ratio for R. Moreover, filters in integrated circuits using standard integrated circuit technology have relatively soft transitions in the filter response FRPAIF and therefore require a relatively large value for the frequency ratio R. Furthermore, unless additional IF upconversion stages are used, the lowest IF frequency FPAIF1 is determined by the frequency separation ΔFPAIF1 that is required in an RF filter for suppressing feedthrough of the RF transmit signal SPARFL or the RF transmit signal SPARFH. Unfortunately, these considerations have led practitioners in the art to use a relatively high frequency FPAC, thereby increasing the difficulty and cost of achieving sufficient linearity in a high speed DAC and other digital processing circuits.
Different frequency plans have been used to resolve this issue. For example, one of the alias signals can be used as the desired IF signal, or the transmission frequency channels may be first generated at RF instead of IF. However, these alternative frequency plans require the resolution of other problems. There is a need for another method in a transmitter for reducing the sampling frequency for converting a digital IF signal to an analog IF signal while still suppressing IF alias signals.